NA300 series processor is a ISO26262 ASIL-D Ready Certified RISC-V CPU IP
N300 Core
WFI/WFE
Debug
JTAG/2-Wires JTAG
ZC
ECLIC
Timer
MUL/DIV
FPU
DSP
N300 uCore
PMP
TEE
ILM
DLM
ICache
DCache
AHB-Lite
APB
Fast-IO
Great Power Efficiency
RV32I MACFDPB/Zc
3-stage Pipeline
Machine, User,Supervisor-Mode
Security (PMP)
AHB-Lite System Bus
RISC-V Standard Debug
JTAG & cJTAG
Low Latency Interrupt
Full Dev Kit & SDK
RV32IMACFDPB ISA supported
Single Issue, in-order 3 stage Harvard Pipeline
Support fast interrupts tail-chaining mechanism ,vectored interrupt processing mode for extremely fast interrupt response,and interrupt preemptions based on interrupt levels.
Configurable ILM/DLM
Configurable Instruction-Cache
Configurable Data-Cache
Support single/double float and SIMD DSP.
Support TEE
Configurable Issue
Full Standard Debug Function with JTAG port.
Full Standard RISC-V Toolchain, and Linux/Windows IDE supported
NA300 is a ISO26262 ASIL-D Ready Certified RISC-V CPU IP