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Nuclei CPU IP | N305 | N307 | N308 | N310 |
Dhrystone(DMIPS/MHz) | 1.87/4.7(Legal/Best Effort) | 2.07/5.13(Legal/Best Effort) | ||
CoreMark(CoreMarks/MHz) | 3.71 | 4.21 | ||
Pipeline Stages | 3 | |||
Issue-Width | Single-Issue | Single-Issue | Single-Issue | Dual-Issue |
User Mode & PMP(MPU) | Configurable | Configurable | Configurable | Configurable |
Hardware Multiplier | Yes | Yes | Yes | Yes |
Hardware Divider | Yes | Yes | Yes | Yes |
Single-Precision/Double-Precision FPU | No | Configurable | Configurable | Configurable |
Instruction-Cache | Configurable | Configurable | Configurable | Configurable |
Data-Cache | No | Configurable | Configurable | Configurable |
ILM | Configurable | Configurable | Configurable | Configurable |
DLM | Configurable | Configurable | Configurable | Configurable |
Digital Signal Processing (DSP) | No | Configurable | Configurable | Configurable |
NICE | Configurable | Configurable | Configurable | Configurable |
TEE | No | No | Configurable | Configurable |