RISC-V IP 2.0 —— "Subsystem"
Why Introduce the "Subsystem" Model?
Beyond CPU IP, in serving a broad customer base, we have identified several pain points with the traditional discrete IP licensing model in the domestic market.
What is the "Subsystem" Model?
To address the aforementioned pain points, Nuclei System Technology introduces the Subsystem model, elevating the Discrete IP licensing approach to a customized SoC Subsystem licensing model. The Subsystem model delivers to customers not just a standalone CPU IP, nor individual SoC IPs, but a complete SoC subsystem.
  • Subsystem Delivery Content: Databook, RTL, TB, Case, Regression, SDC constraints & synthesis reference scripts, FPGA rapid prototyping, Driver, SDK, Ctest, Application Demo
  • This essentially covers approximately 80% of the common front-end SoC development tasks. Customers only need to complete the remaining 20%, such as integrating third-party or proprietary IPs, IO, PLL, and process-specific components (SRAM, IO, PLL, PMU, analog), etc.
Nuclei System Technology's Subsystem model can meet the project requirements of the vast majority of domestic SoC products. Over the past few years, the Subsystem model has served over 80+ SoC projects domestically, receiving market validation and positive feedback.
Customer Case 1: Single-core case — the customer successfully brought up the chip within two weeks using the hardware integration and software SDK provided with this subsystem.
Customer Case 2: Multi-core case — supports dual-mode (real-time processing mode and application processing mode), including an Inter-core Interrupt Unit (IDU), Bus, etc.
Customer Case 3: Complex AMP multi-core — a microcontroller + vector CPU subsystem case.
Customer Case 4: Multi-core SMP case — an 8-core SMP + dual-core SMP large subsystem case.
How Does the "Subsystem" Model Work?
Through the Subsystem model, the front-end cost of a customer's SoC project can be drastically reduced.
By adopting the "Subsystem" model, customers require only
a fraction of the budget (cost-saving)
minimal waiting time (time-saving)
minimal personnel effort (labor-saving)
to complete the front-end work of an SoC chip.
The Subsystem model helps customers save money, time, and effort.

Save Money

The complete SoC Subsystem IP significantly reduces the customer\'s one-time investment cost for SoC development

Save Time

The tailor-made SoC Subsystem greatly shortens the customer\'s SoC development cycle

Save Effort

Comprehensive SoC software drivers and SDK help customers quickly bring up a product prototype

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