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Nuclei CPU IP | N900 | U900 | NX900 | UX900 |
Dhrystone (DMIPS/MHz) |
2.84/6.05(Legal/Best Effort) | 3.09/7.7(Legal/Best Effort) | ||
CoreMark (CoreMarks/MHz) |
5.5 | |||
Pipeline Stages | 9 | |||
Issue-Width | Dual-Issue | Dual-Issue | Dual-Issue | Dual-Issue |
User Mode & PMP(MPU) | Configurable | Configurable | Configurable | Configurable |
Hardware Multiplier and Divider | Configurable | Configurable | Configurable | Configurable |
Half-Precision/Single-Precision/Double-Precision FPU | Configurable | Configurable | Configurable | Configurable |
Instruction Cache | Configurable | Configurable | Configurable | Configurable |
Data Cache | Configurable | Configurable | Configurable | Configurable |
Digital Signal Processing (DSP) | Configurable | Configurable | Configurable | Configurable |
NICE | Configurable | Configurable | Configurable | Configurable |
ILM | Configurable | Configurable | Configurable | Configurable |
DLM | Configurable | Configurable | Configurable | Configurable |
TEE | Configurable | Configurable | Configurable | Configurable |
Vector Extension | Configurable | Configurable | Configurable | Configurable |
Cluster Cache | Configurable | Configurable | Configurable | Configurable |
MMU | No | Configurable | No | Configurable |
Multi-Processors | Configurable | Configurable | Configurable | Configurable |